SR. DESIGN VERIFICATION ENGINEER

Description

We are looking for an experienced engineer to join a growing CPU verification team working on a new line of complex SoC devices for AI applications. You will join a team responsible for exhaustively verifying the architecture and microarchitecture of the CPU, as well as its integration into the larger SoC. We are looking for highly talented, passionate, and versatile engineers that can push hardware to highest performance and quality standards.  

Responsibilities: 

• Technical ownership of the validation of various functional blocks of the CPU
• Developing testplans and driving reviews of the plans with the design team and architects
• Developing validation content like test benches, directed and constrained random assembly tests, and functional coverage
• Closing functional/code coverage for assinged functional blocks

Minimum Qualifications: 

• BS in EE or related technical field
• +5 years of experience in CPU/SoC validation
• Knowledge of CPU and SoC architecture
• Knowledge of high-level verification flow methodology (testplan development, test generation and debug, coverage analysis and closure)
• Experience with SystemVerilog and UVM
• Experience with C/C++ and assembly
• Experience with Python, TCL or other scripting languages
• Ability to clearly communicate across teams with multidisciplinary backgrounds
• Business fluent English

Desired Qualifications: 

• Knowledge of FP processing is a plus
• Experience with FPGA Prototyping and familiarity with Synopsys Zebu emulator a plus